Sanjia technology limited    PCIe_CameraLink Image Simulation Source Based on XILINX K7 XC7K325T
K7K325T

PCIe_CameraLink Image Simulation Source Based on XILINX K7 XC7K325T

This image analog source board is based on Xilinx's FPGAXC7K325T-2FFG900 chip and is pin_to_pin compatible with FPGAXC7K410T-2FFG900. The main function is to realize that the system can receive the noise data of the external camera and input it to the upper computer through the PCI-E interface through the image conversion board.

PCIe_CameraLink Image Simulation Source Based on XILINX K7 XC7K325T

1. Board
This image analog source board is based on Xilinx's FPGAXC7K325T-2FFG900 chip and is pin_to_pin compatible with FPGAXC7K410T-2FFG900. The main function is to realize that the system can receive the noise data of the external camera and input it to the upper computer through the PCI-E interface through the image conversion board.

2. functions and technical indicators:
1. It is used to receive images generated by the upper computer (including a wide test field image and a high-score image), and send the two images to external devices in Cameralink format or LVDS format at the same time;
2. The image conversion board receives the noise data sent by the external camera and transmits it to the upper computer for processing;
3. The image conversion board needs to receive the second pulse signal sent by the test equipment and feed it back to the upper computer through interruption;
The receiver board indicators are shown in the following table.

project

index

Received image resolution

1176 × 864 ,1024 × 1024

Number of image quantization bits

8 to 10bit (16bit when the host computer sends it)

Large frame rate

20Hz

timing accuracy

1ms

Image reading interface

PCI-E

image sending interface

2-channel Base CameraLink and 2-channel parallel LVDS

noise interface

1-channel serial LVDS

, the second pulse interface

RS422 PPS input (second pulse is also input through RS422)

3. software functions:
1. DDR3 interface test program of FPGA.
2. FPGA RS232/RS422/RS485 interface test program.
3. PC base register reading and writing of PCIE of FPGA.
4. Provide Win 7 32-bit driver basic library